The present invention relates generally to analog to digital converters, and more particularly to a simultaneous sampling analog to digital converter.
An analog to digital converter (ADC) converts an analog signal into a digital representation of the analog signal. The ADC typically samples the analog signal at periodic intervals and generates a digital value for each sample indicating the approximate magnitude of the sampled analog signal.
A single-ended (single input) ADC measures the analog signal with respect to a ground signal that is common to both the analog signal and the converter.
A pseudo-differential ADC measures the analog signal with respect to a fixed signal return that can be different than the converter return (ground).
A differential ADC measures the difference between two signals that move in opposite directions with respect to a common mode voltage.
One type of ADC uses a technique known as successive approximation (SAR) to convert each analog input sample to a digital value. Such an ADC typically includes a digital to analog converter (DAC) and a single comparator to produce a digital value representing the magnitude of the analog input sample. The DAC is used to produce a reference voltage based upon a digital input value. The comparator is used to compare the DAC output to the analog input sample. The ADC converts an analog input sample to a digital value by successively changing the DAC output and comparing the DAC output to the analog input sample. The ADC effectively makes a bisection or binomial search beginning with a DAC output of zero. The ADC provisionally sets each bit of the DAC, beginning with the most significant bit, and then uses the comparator to compare the DAC output to the analog input signal being measured. If setting a bit to one causes the DAC output to rise above the analog input signal voltage, that bit is returned to zero.
It is sometimes necessary or desirable to sample two analog signals simultaneously. This can be useful, for example, for maintaining the relative phase information of the two analog signals.
In accordance with one aspect of the invention, a dual channel ADC uses two DACs and a single comparator to convert two analog input channels. One DAC (the SarDAC) is used for successive approximation, while the other DAC (the CalDAC) is used for calibrating the SarDAC. The dual channel ADC allows for sampling and conversion of single-ended, pseudo-differential, and fully differential analog input signals while maintaining layout symmetry and reducing crosstalk without substantially increasing circuit area. The single comparator is used for converting both analog input channels. Additional logic (such as switches or digital logic) is used to connect the input sampling capacitors and DACs to the appropriate inputs of the comparator for converting the analog input channels.
In a typical embodiment, a first sampling capacitor is used to sample a first analog input signal and a second sampling capacitor is used to sample a second analog input signal. In order to convert the first analog input signal sample, the first sampling capacitor and the SarDAC are connected to a first comparator input while the CalDAC is connected to a second comparator input. In order to convert the second analog input signal sample, the second sampling capacitor and the SarDAC are connected to the second comparator input while the CalDAC is connected to the first comparator input.
A separate capacitor may be used on each channel to sample a corresponding ground reference signal or differential input signal. The capacitor corresponding to the first sampling capacitor is connected to the second comparator input along with the CalDAC during conversion of the first analog input signal sample. The capacitor corresponding to the second sampling capacitor is connect to the first comparator input along with the CalDAC during conversion of the second analog input signal sample.
Various switches are typically used to connect each of the capacitors to the appropriate comparator input.
Additional switches may also be used to connect each DAC to the appropriate comparator input. Alternatively, digital logic can be used to convert the analog input signal samples without such switches.
An exemplary dual channel analog to digital converter typically includes a first sampling capacitor for sampling a first analog input signal, a second sampling capacitor for sampling a second analog input signal, a first digital to analog converter for successive approximation of the first analog input signal and the second analog input signal, a second digital to analog converter for calibrating the first digital to analog converter, a comparator having a first comparator input and a second comparator input, input sampling logic operably coupled to cause the first sampling capacitor to sample the first analog input signal and to cause the second sampling capacitor to sample the second analog input signal, and conversion logic operably coupled to connect the first sampling capacitor and the first digital to analog converter to the first comparator input and connect the second digital to analog converter to the second comparator input for converting a first analog input signal sample and to connect the second sampling capacitor and the first digital to analog converter to the second comparator input and connect the second digital to analog converter to the first comparator input for converting a second analog input signal sample.
The input sampling logic typically includes a first sampling switch operably coupled to selectively connect the first sampling capacitor to a first reference voltage for sampling the first analog input signal and a second sampling switch operably coupled to selectively connect the second sampling capacitor to a second reference voltage for sampling the second analog input signal.
The conversion logic typically includes a switch having a first position connecting the first sampling capacitor to the first comparator input for converting the first analog input signal sample and a second position disconnecting the first sampling capacitor from the first comparator input and a switch having a first position connecting the second sampling capacitor to the second comparator input for converting the second analog input signal sample and a second position disconnecting the second sampling capacitor from the second comparator input.
The conversion logic may also include a cross-connect switch operably coupled to connect the first digital to analog converter to the first comparator input and the second digital to analog converter to the second comparator input for converting the first analog input signal sample and to connect the first digital to analog converter to the second comparator input and the second digital to analog converter to the first comparator input for converting the second analog input signal sample. The cross-connect switch typically includes a switch having a first position connecting the first digital to analog converter to the first comparator input for converting the first analog input signal sample and a second position disconnecting the first digital to analog converter from the first comparator input, a switch having a first position connecting the second digital to analog converter to the second comparator input for converting the first analog input signal sample and a second position disconnecting the second digital to analog converter from the second comparator input, a switch having a first position connecting the first digital to analog converter to the second comparator input for converting the second analog input signal sample and a second position disconnecting the first digital to analog converter from the second comparator input, and a switch having a first position connecting the second digital to analog converter to the first comparator input for converting the second analog input signal sample and a second position disconnecting the second digital to analog converter from the first comparator input.
Alternatively, the conversion logic may include digital logic operably coupled to connect the first digital to analog converter to the first comparator input and the second digital to analog converter to the second comparator input for converting the first analog input signal sample and to connect the first digital to analog converter to the second comparator input and the second digital to analog converter to the first comparator input for converting the second analog input signal sample.
The dual channel analog to digital converter may also include a third sampling capacitor for sampling a third analog input signal and a fourth sampling capacitor for sampling a fourth analog input signal. The third and fourth analog input signals may be ground reference signals corresponding to the first and second analog input signals, respectively. The third and fourth analog input signals may be components of fully-differential analog input signals corresponding to the first and second analog input signals, respectively.
In any case, the input sampling logic typically includes a third sampling switch operably coupled to selectively connect the third sampling capacitor to a third reference voltage for sampling the third analog input signal and a fourth sampling switch operably coupled to selectively connect the fourth sampling capacitor to a fourth reference voltage for sampling the fourth analog input signal. The conversion logic is operably coupled to connect the third sampling capacitor to the second comparator input for converting the first analog input signal sample and to connect the fourth sampling capacitor to the first comparator input for converting the second analog input signal sample. The conversion logic typically includes a switch having a first position connecting the third sampling capacitor to the second comparator input for converting the first analog input signal sample and a second position disconnecting the third sampling capacitor from the second comparator input and a switch having a first position connecting the fourth sampling capacitor to the first comparator input for converting the second analog input signal sample and a second position disconnecting the fourth sampling capacitor from the first comparator input.
The input sampling logic may provide for simultaneously sampling the first analog input signal and the second analog input signal. Alternatively, the input sampling logic may provide for sampling the second analog input signal during conversion of the first analog input signal sample and sampling the first analog input signal during conversion of the second analog input signal sample.
In a typical embodiment, the various components are configured in a substantially symmetric layout.
In a typical embodiment, the first sampling capacitor is formed from a first number of unit capacitors surrounded by a first number of dummy capacitors, and the second sampling capacitor is formed from a second number of unit capacitors surrounded by a second number of dummy capacitors. The additional capacitors used for ground reference sampling or fully-differential sampling are typically formed from the dummy capacitors.
In order to reduce crosstalk between the inputs due to the finite routing and bonding impedances within the package, the various capacitors may be sampled with reference to separate common mode voltages rather than to a common voltage.
The conversion logic can first convert the first analog input signal sample and then convert the second analog input signal sample. Alternatively, the conversion logic can first convert the second analog input signal sample and then convert the first analog input signal sample.